摘要 |
<p>PROBLEM TO BE SOLVED: To provide a technology which improves the visibility of an alignment mark thereby enabling high accuracy positioning between a semiconductor chip and a mounting substrate.SOLUTION: In a semiconductor chip forming an LCD driver, a mark MK1 is formed at an alignment mark formation region on a semiconductor substrate 1S. The mark MK1 is formed by the same layer as top layer wiring (a third layer wiring L3) of an integrated circuit formation region. Patterns P1a, P1b, P2, P3 are formed at lower layers of the mark MK1 and a background region enclosing the mark MK1. The pattern P1a is formed by the same layer as second layer wiring L2. The pattern P1b is formed as the same layer as first wiring L1. Further, the pattern P2 is formed by the same layer as a gate electrode G and the pattern P3 is formed by the same layer as an element separation region STI.</p> |