IP CORE DESIGN SUPPORTING USER-ADDED SCAN REGISTER OPTION

摘要

An integrated circuit carries an intellectual property core. The intellectual property core includes a test access port 39 with test data input leads 15, test data output leads 13, control leads 17 and an external register present, ERP lead 37. A scan register 25 encompasses the intellectual property core and ERP lead 37 carries a signal indicating the presence of the scan register.

主权项

1. An integrated circuit comprising:
a. an intellectual property core free of any boundary scan register; and b. a test access port formed in the core, the test access port including test port interface signal leads and additional test input, test output and test control signal leads.