| 发明名称 |
INTEGRATED CIRCUIT DEVICE, METHOD FOR PRODUCING MASK LAYOUT, AND PROGRAM FOR PRODUCING MASK LAYOUT |
| 摘要 |
According to one embodiment, a method for producing a mask layout of an exposure mask for forming wiring of an integrated circuit device, includes estimating shape of the wiring formed based on an edge of a pattern included in an initial layout of the exposure mask. The method includes modifying shape of the edge if the estimated shape of the wiring does not satisfy a requirement. |
| 申请公布号 |
US2014252639(A1) |
申请公布日期 |
2014.09.11 |
| 申请号 |
US201313969823 |
申请日期 |
2013.08.19 |
| 申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
OKADA Motohiro;SOTA Shuhei;HASHIMOTO Takaki;KAI Yasunobu;MASUKAWA Kazuyuki;KONO Yuko;KODAMA Chikaaki;UNO Taiga;MASHITA Hiromitsu |
| 分类号 |
H01L21/66;H01L23/48;G06F17/50 |
主分类号 |
H01L21/66 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for producing a mask layout of an exposure mask for forming wiring of an integrated circuit device, comprising:
estimating shape of the wiring formed based on an edge of a pattern included in an initial layout of the exposure mask; and modifying shape of the edge if the estimated shape of the wiring does not satisfy a requirement. |
| 地址 |
Minato-ku JP |
