发明名称
摘要 A method of forming an integrated circuit structure includes providing a wafer having a silicon substrate; forming a plurality of shallow trench isolation (STI) regions in the silicon substrate; and forming recesses by removing top portions of the silicon substrate between opposite sidewalls of the plurality of STI regions. Substantially all long sides of all recesses in the silicon substrate extend in a same direction. A III-V compound semiconductor material is then epitaxially grown in the recesses.
申请公布号 JP5587128(B2) 申请公布日期 2014.09.10
申请号 JP20100228979 申请日期 2010.10.08
申请人 发明人
分类号 H01L21/20;H01L21/336;H01L21/8234;H01L27/088;H01L29/78 主分类号 H01L21/20
代理机构 代理人
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