发明名称 |
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF |
摘要 |
<p>A semiconductor device which can reduce a heat stress to a solder layer with suppressing an increase of thermal resistance is provided. A semiconductor device comprises a semiconductor element (5), a solder layer (4) which is arranged on at least one surface of the semiconductor element and a lead frame (2) which is arranged on the solder layer so that a porous nickel plating part (1) is sandwiched between the lead frame and the solder layer. Compared with a case that the semiconductor element and the lead frame are jointed by a solder directly, an increased part of a thermal resistance of the solder junction is held down only to a part of the porous nickel plating part and a thermal resistance applied to the solder layer can be reduced.</p> |
申请公布号 |
EP2775515(A1) |
申请公布日期 |
2014.09.10 |
申请号 |
EP20120837653 |
申请日期 |
2012.10.01 |
申请人 |
PANASONIC CORPORATION |
发明人 |
IKUTA, KEIKO;JIN, LIANJI;HIROSE, TAKAYUKI;KOJIMA, TOSHIYUKI;TSUKAHARA, NORIHITO;TANDA, KOHICHI |
分类号 |
H01L23/495;H01L21/60 |
主分类号 |
H01L23/495 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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