| 摘要 |
<p>A device for controlling frequency synchronization comprises a processor (101) for controlling a frequency-controlled clock signal on the basis of received timing messages so as to achieve frequency-locking between the frequency-controlled clock signal and a reference clock signal. For the purpose of finding such timing messages which have experienced similar transfer delays and thus are suitable for the frequency control, the processor is configured to control a phase-controlled clock signal on the basis of the timing messages so as to achieve phase-locking between the phase-controlled clock signal and the reference clock signal, and to select the timing messages to be used for the frequency control on the basis of phase-error indicators related to the phase control. Thus, the phase-controlled clock signal is an auxiliary clock signal that is utilized for performing the frequency control.</p> |
