Variable resistance nonvolatile storage device and method of forming memory cell

摘要

A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate, (ii) a variable resistance element having: lower and upper electrodes; and a variable resistance layer whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes, and (iii) a MOS transistor formed on the substrate, wherein the variable resistance layer includes: oxygen-deficient transition metal oxide layers having compositions MOx and MOy (where x

主权项

1. A variable resistance nonvolatile storage device comprising:
a semiconductor substrate; a variable resistance element including: a first electrode; a second electrode; and a variable resistance layer which is provided between said first and second electrodes and in contact with said first and second electrodes and which has a resistance value that reversibly varies based on voltage signals each of which has a different polarity and is applied between said first and second electrodes; and an N-type MOS transistor formed on a main surface of said semiconductor substrate, said N-type MOS transistor including: a first N-type diffusion layer region; a gate; and a second N-type diffusion layer region formed on a side of said gate opposite said first N-type diffusion layer region, wherein said variable resistance layer includes: a first transition metal oxide layer which is in contact with said first electrode; and a second transition metal oxide layer which is in contact with said second electrode, wherein said second transition metal oxide layer has a higher resistance value than a resistance value of said first transition metal oxide layer, wherein said first N-type diffusion layer region of said N-type MOS transistor is connected with said first electrode included in said variable resistance element to form a memory cell, so that a substrate bias effect in said N-type MOS transistor is smaller when one of the voltage signals having a polarity that causes a resistance change to high resistance state in said variable resistance layer is applied to said N-type MOS transistor and said variable resistance element, than when another one of the voltage signals having a polarity that causes a resistance change to low resistance state in said variable resistance layer is applied to said N-type MOS transistor and said variable resistance element, wherein said first transition metal oxide layer comprises an oxide of a first transition metal, said second transition metal oxide layer comprises an oxide of a second transition metal, and the first transition metal and the second transition metal are different in type from each other, and wherein said first transition metal oxide layer of said variable resistance element and said first electrode of said variable resistance element are each connected between said first N-type diffusion layer region and said second transition metal oxide layer of said variable resistance element.