发明名称 Level shifter circuit, integrated circuit device, electronic watch
摘要 A first circuit receives input signals of the first electric potential system which uses a first high potential and a first low potential as the power supply electric potential, and outputs a first signal which is a signal of the first electric potential system, a second circuit which generates output signals according to the input signal of the second electric potential system which uses as the power supply electric potential a second high potential of the first electric potential system, wherein the second circuit includes an initial stage inverter that receives the second signals and outputs third signals, and an initial stage switch that switches between connecting and disconnecting the initial stage inverter and a power supply that supplies the second high potential or a power supply that supplies the second low potential based on the first signals, and generates the output signals based on the third signals.
申请公布号 US8829971(B2) 申请公布日期 2014.09.09
申请号 US201213676617 申请日期 2012.11.14
申请人 Seiko Epson Corporation 发明人 Yamazaki Yutaka
分类号 H03L5/00;H03K19/0185 主分类号 H03L5/00
代理机构 Global IP Counselors, LLP 代理人 Global IP Counselors, LLP
主权项 1. A level shifter circuit for transmitting a signal of a first electric potential system to a second electric potential system for which the power supply potential difference is larger than the first electric potential system, comprising: a first circuit for receiving an input signal of the first electric potential system which uses a first high potential which is on the high potential side and a first low potential which is on the low potential side as the power supply electric potential, and outputs a first signal which is a signal of the first electric potential system, the first circuit operating with the first electric potential system; a second circuit which generates an output signal, according to the input signal, of the second electric potential system which uses as the power supply electric potential a second high potential which is on the high potential side and a second low potential which is on the low potential side, the second circuit operating with the second electric potential system; and a buffer circuit which receives the input signal and outputs a logically equivalent second signal to the input signal, the second signal being a signal of the first electric potential system, the buffer circuit operating with the first electric potential system, the second circuit including an initial stage inverter which is an inverter circuit that receives the second signal and outputs a third signal, and an initial stage switch that switches between connecting and disconnecting the initial stage inverter and a power supply that supplies the second high potential or a power supply that supplies the second low potential, based on the first signal, and generates the output signal based on the third signal.
地址 Tokyo JP