发明名称 D/A converter
摘要 A digital-to-analog (D/A) converter includes D/A conversion circuits and an amplifier circuit coupled between the D/A conversion circuits. Each D/A conversion circuit includes an R-2R ladder type resistor network, first transistors coupled between the resistor network and a first wiring at a first voltage level, and second transistors coupled between the resistor network and a second wiring at a second voltage level. The sizes of the first transistors are set at a ratio of powers of 2. The sizes of second transistors are set at a ratio of powers of 2. The second transistors are respectively turned on and off complementarily to the first transistors according to the digital input signal.
申请公布号 US8830103(B2) 申请公布日期 2014.09.09
申请号 US201313776058 申请日期 2013.02.25
申请人 Fujitsu Semiconductor Limited 发明人 Suzuki Hisao
分类号 H03M1/78;H03M1/68 主分类号 H03M1/78
代理机构 Arent Fox LLP 代理人 Arent Fox LLP
主权项 1. A digital-to-analog (D/A) converter generating an analog signal corresponding to a digital input signal, the D/A converter comprising: a plurality of D/A conversion circuits; and an amplifier circuit coupled between the plurality of D/A conversion circuits in a negative feedback manner; wherein: the plurality of D/A conversion circuits include a first-stage D/A conversion circuit configured to receive a multi-bit digital input signal including a least significant bit of the digital input signal, and another D/A conversion circuit configured to receive a higher-order bit than a bit of a digital input signal received by a previous-stage D/A conversion circuit thereof, and each D/A conversion circuit includes: an R-2R ladder type resistor network corresponding to the digital input signal received by the D/A conversion circuit,a plurality of first transistors which are coupled between the resistor network and a first wiring at a first voltage level and the sizes of which are set at a ratio of powers of 2, anda plurality of second transistors which are coupled between the resistor network and a second wiring at a second voltage level, the sizes of which are set at a ratio of powers of 2 and which are respectively turned on and off complementarily to the plurality of first transistors according to the digital input signal.
地址 Yokohama JP