发明名称 Ultrahigh density vertical NAND memory device
摘要 A monolithic three dimensional NAND string includes a semiconductor channel having at least one end extending substantially perpendicular to a major surface of a substrate, a plurality of control gates extending substantially parallel to the major surface of the substrate, including a first control gate located in a first device level and a second control gate located in a second device level, a charge storage material located in the first device level and in the second device level, a blocking dielectric located between the charge storage material and the plurality of control gates, and a tunneling dielectric located between the charge storage material and the semiconductor channel. The tunneling dielectric has a straight sidewall, portions of the blocking dielectric have a clam shape, and each of the plurality of control gates is located at least partially in an opening in the clam-shaped portion of the blocking dielectric.
申请公布号 US8829591(B2) 申请公布日期 2014.09.09
申请号 US201314086139 申请日期 2013.11.21
申请人 Sandisk Technologies Inc. 发明人 Alsmeier Johann
分类号 H01L29/76 主分类号 H01L29/76
代理机构 The Marbury Law Group PLLC 代理人 The Marbury Law Group PLLC
主权项 1. A monolithic three dimensional NAND string, comprising: a semiconductor channel located over a substrate, at least one end of the semiconductor channel extending substantially perpendicular to a major surface of the substrate; a plurality of control gates extending substantially parallel to the major surface of the substrate, wherein the plurality of control gates comprise at least a first control gate located in a first device level and a second control gate located in a second device level located over the substrate and below the first device level; a charge storage material located in the first device level and in the second device level; a blocking dielectric located between the charge storage material and the plurality of control gates; and a tunneling dielectric located between the charge storage material and the semiconductor channel; wherein: the tunneling dielectric has a straight sidewall;portions of the blocking dielectric have a clam shape; andeach of the plurality of control gates is located at least partially in an opening in the clam-shaped portion of the blocking dielectric.
地址 Plano TX US