发明名称 Detecting data transmission errors in an inter-integrated circuit (‘I<sup>2</sup>C’) system
摘要 Detecting data transmission errors in an I2C system that includes a source device, an destination device, and a signal line coupling the I2C source and destination device, including: receiving, by the I2C destination device from the I2C source device, a data transmission signal, the data transmission signal encoded with a set of bits; detecting, by the I2C destination device, rise time of a preselected bit in the set of bits; if the detected rise time is less than a predefined threshold, determining that the I2C source device injected a parity bit in the signal, and if the detected rise time is not less than the predefined threshold, determining that the I2C source device did not inject a parity bit in the signal; and determining whether the data transmission signal includes an error in dependence upon the parity of the set of bits.
申请公布号 US8832538(B2) 申请公布日期 2014.09.09
申请号 US201213530318 申请日期 2012.06.22
申请人 International Business Machines Corporation 发明人 Decesaris Michael;Jacobson Steven C.;Remis Luke D.;Sellman Gregory D.
分类号 G06F11/00;H03M13/00 主分类号 G06F11/00
代理机构 Biggers Kennedy Lenart Spraggins LLP 代理人 Lenart Edward J.;Brown Katherine S.;Biggers Kennedy Lenart Spraggins LLP
主权项 1. A method of detecting data transmission errors in an Inter-Integrated Circuit (‘I2C’) system, the I2C system comprising an I2C source device, an I2C destination device, and a data transmission signal line coupling the I2C source device and the I2C destination device, the data transmission signal line configured to carry data transmission signals between the I2C source device and the I2C destination device, the method comprising: receiving, by the I2C destination device from the I2C source device, a data transmission signal, the data transmission signal encoded with a set of bits and comprising voltage alternating between a logic low voltage and a logic high voltage; detecting, by the I2C destination device, rise time of a preselected bit in the set of bits of the data transmission signal; if the detected rise time of the preselected bit is less than a predefined threshold, determining that the I2C source device injected a parity bit in the data transmission signal, and if the detected rise time of the preselected bit is not less than a predefined threshold, determining that the I2C source device did not inject a parity bit in the data transmission signal; and determining, by the I2C destination device, whether the data transmission signal includes an error in dependence upon the parity of the set of bits of the data transmission signal.
地址 Armonk NY US
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