发明名称 |
Negative word line driver for semiconductor memories |
摘要 |
A semiconductor memory includes a word line driver and a negative voltage generator. The word line driver includes a first inverter configured to drive a word line at one of a first voltage supplied by a first voltage source and a second voltage supplied by a second voltage source. The negative voltage generator is configured to provide a negative voltage with respect to the second voltage to an input of the first inverter in response to a control signal for performing at least one of a read or a write operation of a memory bit cell coupled to the word line. |
申请公布号 |
US8830784(B2) |
申请公布日期 |
2014.09.09 |
申请号 |
US201113273369 |
申请日期 |
2011.10.14 |
申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Yang Chen-Lin;Chan Wei Min;Hua Chung-Hsien |
分类号 |
G11C8/00;G11C8/08;G11C7/22;G11C11/418 |
主分类号 |
G11C8/00 |
代理机构 |
Duane Morris LLP |
代理人 |
Duane Morris LLP |
主权项 |
1. A semiconductor memory, comprising:
a word line driver including a first inverter configured to drive a word line at one of a first voltage supplied by a first voltage source and a second voltage supplied by a second voltage source; and a negative voltage generator configured to provide a negative voltage with respect to the second voltage to an input of the first inverter in response to a control signal for performing at least one of a read or a write operation of a memory bit cell coupled to the word line, wherein the negative voltage generator includes
a timing device having an input coupled to a first node that is coupled to the input of the first inverter and having an output coupled to a second node;a first transistor having a are coupled to the second node a source coupled to the second voltage supply, and a drain coupled to a third node; anda capacitor coupled to the second node and to the third node and configured to generate the negative voltage in response to the control signal. |
地址 |
Hsin-Chu TW |