Nonvolatile semiconductor memory device

摘要

A control circuit is configured to, during an erase operation, set a voltage of a first line connected to a selected cell unit to a voltage larger than a voltage of a gate of a first transistor included in the selected cell unit by an amount of a first voltage; set a voltage difference between a voltage of a first line connected to an unselected cell unit and a voltage of a gate of a first transistor included in the unselected cell unit to a second voltage, the first and second voltages being different; apply in the selected and unselected cell units a third voltage to a gate of at least one of dummy transistors in a dummy memory string; and apply a fourth voltage to a gate of another one of the dummy transistors in the dummy memory string, the fourth voltage being lower than the third voltage.

主权项

1. A nonvolatile semiconductor memory device comprising:
a first unit including a plurality of memory cells, a first transistor, a second transistor and a third transistor, the first transistor being electrically connected to the second transistor in series, the second transistor being electrically connected to the plurality of memory cells, the third transistor being electrically connected to the plurality of memory cells; a first line electrically connected to a first end of the first unit; a second line electrically connected to a second end of the first unit; a third line electrically connected to a gate of the first transistor; and a controller configured to perform an erase operation on the condition that a first voltage is applied to the first line and the second line, a second voltage is applied to the third line and the first voltage is higher than the second voltage.