| 发明名称 | Resistance change memory device and current trimming method thereof | ||
| 摘要 | A resistance change memory device includes an array of resistance change memory cells, and a writing circuit configured to reset a selected memory cell to a high resistance state by supplying a RESET current to the selected memory cell in the array of resistance change memory cells in a program operation mode, wherein a level of the RESET current depends on a distribution of initial RESET currents for the array of resistance change memory cells. | ||
| 申请公布号 | US8830728(B2) | 申请公布日期 | 2014.09.09 |
| 申请号 | US201213554146 | 申请日期 | 2012.07.20 |
| 申请人 | Samsung Electronics Co., Ltd. | 发明人 | Lee Jung Hyuk;Ha Daewon;Sim Kyu-Rie |
| 分类号 | G11C11/00;G11C8/00;G11C29/02;G11C13/00;G11C17/16;G11C11/16;G11C29/50 | 主分类号 | G11C11/00 |
| 代理机构 | Lee & Morse, P.C. | 代理人 | Lee & Morse, P.C. |
| 主权项 | 1. A resistance change memory device, comprising: an array of resistance change memory cells; and a writing circuit configured to reset a selected memory cell to a high resistance state by supplying a RESET current to the selected memory cell in the array of resistance change memory cells in a program operation mode, wherein a level of the RESET current depends on a distribution of initial RESET currents for the array of resistance change memory cells, wherein the writing circuit is operationally connected to a trimming circuit for trimming a program current level. | ||
| 地址 | Suwon-si, Gyeonggi-do KR | ||