| 摘要 |
PROBLEM TO BE SOLVED: To reduce a processing load onto a CPU and to improve functionality by shortening a processing time required for frame analysis processing.SOLUTION: A frame analysis apparatus comprises: a plurality of fundamental circuits Ci; and a control circuit 20. Each of the fundamental circuits Ci includes: a fundamental selector 22 which selects any arbitrary field of input frame information Fin which is inputted by dividing a frame FI for the unit of N×A bytes, for the unit of A bits when outputting an analysis result of the input frame information Fin as output frame information Fout for the unit of A bits; and a register 23 for holding and outputting a selection result for the unit of A bits. The control circuit 20 instructs a field to be selected to each fundamental selector 22 and controls whether to hold the selection result into each register 23 and the presence/absence of output from each register 23. The selection result held in each register 23 is inputted, as the output frame information Fout of a frame analysis apparatus 100, to each of the fundamental selectors 22 in the plurality of fundamental circuits Ci together with the input frame information Fin. |
