Group Word Line Erase And Erase-Verify Methods For 3D Non-Volatile Memory

摘要

An erase operation for a 3D stacked memory device assigned storage elements to groups according to an expected erase speed. The storage elements are then erased according to their group to provide a more uniform erase depth and a tighter erase distribution. In one approach, the control gate voltages are set differently for the different groups to slow down the storage elements which are expected to have a faster programming speed. An erase or inhibit status can be set for all groups together. In another approach, the control gate voltages are common for the different groups but an erase or inhibit status is set for each group separately.

主权项

1. A method for performing an erase operation, comprising:
charging a channel of an active area of a plurality of memory cells, the charging of the channel comprises applying an erase voltage to one end of the active area, the plurality of memory cells are formed above a substrate in multiple physical levels of memory cells in a three-dimensional non-volatile memory, the active area comprises a pillar which extends vertically in the three-dimensional non-volatile memory; during the charging of the channel, setting control gate voltages of the plurality of memory cells to encourage erasing of the memory cells, the setting the control gate voltages is based on an assignment of the plurality of memory cells to different groups, each group of the different groups comprises multiple adjacent memory cells of the plurality of memory cells; and performing an erase-verify test for the plurality of memory cells.