发明名称 APPARATUS, METHOD, AND PROCESSOR
摘要 PROBLEM TO BE SOLVED: To synchronize redundant processors by using a state history.SOLUTION: An apparatus comprises: two processors 110 and 120; state storages 130 and 140 for each processor; and control logic 158. Each processor executes the same instructions. The state storage stores compressed processor state information for each instruction executed by the processors. The control logic synchronizes the two processors on the basis of entries from the state storage.
申请公布号 JP2014160483(A) 申请公布日期 2014.09.04
申请号 JP20140076695 申请日期 2014.04.03
申请人 INTEL CORP 发明人 SHUBHENDU S MUKHERJEE ; ARIJIT BISWAS ; STEVEN RAASCH ; PAUL RACUNAS
分类号 G06F11/18 主分类号 G06F11/18
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