发明名称 |
POWER SAVING MEMORY APPARATUS, SYSTEMS, AND METHODS |
摘要 |
Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory cell is not being accessed, and a power controller to cause the voltage to change between refresh operations of the memory device. Other embodiments including additional apparatus, systems, and methods are described. |
申请公布号 |
US2014247680(A1) |
申请公布日期 |
2014.09.04 |
申请号 |
US201414277443 |
申请日期 |
2014.05.14 |
申请人 |
Micron Technology, Inc. |
发明人 |
Ito Yutaka;Nomura Masayoshi;Abe Keiichiro |
分类号 |
G11C5/14 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus comprising:
a first voltage generator to generate a first voltage to apply to a first line used to access a memory cell of a memory device, wherein the first voltage is applied to the first line when the memory cell is not being accessed; a second voltage generator to generate a second voltage to apply to a second line used to transfer data with the memory cell; and a power controller to cause the first voltage to change during a time interval between refresh operations during a standby mode of the memory device and to cause the second voltage to increase in value between the refresh operations. |
地址 |
Boise ID US |