| 发明名称 |
PARTITIONED ERASE AND ERASE VERIFICATION IN NON-VOLATILE MEMORY |
| 摘要 |
A set of memory cells can be erased by individually erasing portions of the set in order to normalize the erase behavior of each memory cell and provide more consistent erase rates. An erase voltage pulse can be applied to the set of memory cells with a first group of cells biased for erase and a second group biased to inhibit erase. The erase depth is made shallower as the device is cycled more. |
| 申请公布号 |
US2014247667(A1) |
申请公布日期 |
2014.09.04 |
| 申请号 |
US201414195282 |
申请日期 |
2014.03.03 |
| 申请人 |
SanDisk Technologies Inc. |
发明人 |
Dutta Deepanshu;Lai Chun-Hung;Lee Shih-Chung;Oowada Ken;Higashitani Masaaki |
| 分类号 |
G11C16/34 |
主分类号 |
G11C16/34 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. (canceled) |
| 地址 |
Plano TX US |
