| 发明名称 |
Resistive Memory Reset |
| 摘要 |
A resistive memory cell includes a switch and a resistive switching device. The switch includes a first terminal connected to a select line and a gate terminal connected to a word line. The resistive switching device is connected between a second terminal of the switch and a bit line. The resistive switching device is resettable by having a positive bias applied to the word line and a negative bias applied to the bit line. |
| 申请公布号 |
US2014247644(A1) |
申请公布日期 |
2014.09.04 |
| 申请号 |
US201313782632 |
申请日期 |
2013.03.01 |
| 申请人 |
Ltd. Taiwan Semiconductor Manufacturing Company, |
发明人 |
Yang Chin-Chieh;Chu Wen-Ting;Tu Kuo-Chi;Liao Yu-Wen;Chang Chih-Yang;Chen Hsia-Wei |
| 分类号 |
G11C13/00 |
主分类号 |
G11C13/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for resetting a resistive memory cell, the method comprising:
applying a first voltage to a word line connected to a gate terminal of a switch within the memory cell, a first terminal of the switch being connected to a select line; and applying a second voltage to a bit line connected to a resistive switching device within the memory cell, the resistive switching device being connected between the bit line and a second terminal of the switch; wherein the first and second voltages are of opposite polarity. |
| 地址 |
US |
