| 摘要 |
A STT-MRAM comprises apparatus and a method of manufacturing a spin-torque magnetoresistive memory and a plurality of a three-terminal magnetoresistive memory element having a voltage-gated recording. The first terminal, a bit line, is connected to the top magnetic reference layer, and the second terminal is located at the middle recording layer which is connected to the underneath select CMOS transistor through a VIA and the third one, a digital line, is a voltage gate with a narrow pillar underneath the memory layer across an insulating functional layer which is used to reduce the write current by manipulating the perpendicular anisotropy of the recording layer. The fabrication includes formation of a bottom electrode, formation of digital line, formation of memory cell & VIA connection and formation of the top bit line. Photolithography patterning and hard mask etch are used to form the digital line pillar and small memory pillar. Ion implantation is used to convert a buried dielectric layer outside the center memory pillar into an electric conductive path between middle recording layer and underneath CMOS transistor. |
