发明名称 |
WIRING CONFIGURATION OF A BUS SYSTEM AND POWER WIRES IN A MEMORY CHIP |
摘要 |
Devices and circuits for wiring configurations of a bus system and power supply wires in a memory chip with improved power efficiencies. The effective resistance on the power supply wires may be reduced by utilizing non-active bus wires as additional power wires connected in parallel with the other supply wires. The non-active bus wires may reduce or prevent parasitic couplings and cross-talk effects between neighboring sensitive wires, thereby improving performance of the chip. |
申请公布号 |
US2014247681(A1) |
申请公布日期 |
2014.09.04 |
申请号 |
US201414274307 |
申请日期 |
2014.05.09 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
KUZMENKA Maksim;SCHEIDELER Dirk;SCHILLER Kai |
分类号 |
G11C7/20;H03K19/177;G11C5/14 |
主分类号 |
G11C7/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
Boise ID US |