发明名称
摘要 A gate signal line driving circuit includes plural basic circuits, each outputting to a gate signal line a gate signal which is high during a high signal period and low during a low signal period. Each of the basic circuits includes: a gate line high voltage application circuit which is turned on in accordance with the high signal period to apply the high voltage to the gate signal line; a gate line low voltage application circuit which is turned on in accordance with the low signal period to apply the low voltage to the gate signal line; and a second gate line low voltage application circuit which is turned on to apply the low voltage to the gate signal line in at least a part of a period between turning off the gate line high voltage application circuit and turning on the gate line low voltage application circuit.
申请公布号 JP5584148(B2) 申请公布日期 2014.09.03
申请号 JP20110013512 申请日期 2011.01.25
申请人 发明人
分类号 G09G3/36;G02F1/133;G09G3/20 主分类号 G09G3/36
代理机构 代理人
主权项
地址