发明名称 |
MULTIPLE-CORE COMPUTER PROCESSOR FOR REVERSE TIME MIGRATION |
摘要 |
A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of the plurality of caches being associated with one and only one of the plurality of processor cores, and a plurality of memories, each of the plurality of memories being associated with a different set of at least one of the plurality of processor cores and each of the plurality of memories being configured to be visible in a global memory address space such that the plurality of memories are visible to two or more of the plurality of processor cores, wherein at least one of a number of the processor cores, a size of each of the plurality of caches, or a size of each of the plurality of memories is configured for performing a reverse-time-migration (RTM) computation. |
申请公布号 |
EP2771721(A1) |
申请公布日期 |
2014.09.03 |
申请号 |
EP20120843129 |
申请日期 |
2012.10.26 |
申请人 |
THE REGENTS OF THE UNIVERSITY OF CALIFORNIA;FRAUNHOFER-GESELLSCHAFT ZUR FÖRDERUNG DER ANGEWANDTEN FORSCHUNG E.V. |
发明人 |
SHALF, JOHN;DONOFRIO, DAVID;OLIKER, LEONID;KRUEGER, JENS;WILLIAMS, SAMUEL |
分类号 |
G01V1/00 |
主分类号 |
G01V1/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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