发明名称 |
Image data processing device and image reading apparatus |
摘要 |
An image data processing device includes a first integrated circuit, a second integrated circuit, and a third integrated circuit. The first integrated circuit includes a first image processing circuit for first image processing for image data in a first memory, and a first serial interface for direct memory access transfer between the first memory and a third memory. The second integrated circuit includes a second image processing circuit for second image processing for image data in a second memory, and a second serial interface for direct memory access transfer between the second memory and the third memory. The third integrated circuit includes a third image processing circuit for third image processing for image data in the third memory, and a third serial interface for direct memory access transfer between the third memory and the first memory, and between the third memory and the second memory. |
申请公布号 |
US8823995(B2) |
申请公布日期 |
2014.09.02 |
申请号 |
US201313950693 |
申请日期 |
2013.07.25 |
申请人 |
PFU Limited |
发明人 |
Doumae Keisuke;Iwayama Akira;Shinde Hirotake |
分类号 |
G06F15/00;G06F3/12;G06K1/00;G06K15/00 |
主分类号 |
G06F15/00 |
代理机构 |
Christie, Parker & Hale, LLP |
代理人 |
Christie, Parker & Hale, LLP |
主权项 |
1. An image data processing device comprising:
a first integrated circuit, a second integrated circuit, and a third integrated circuit; and a first memory capable of being accessed by the first integrated circuit, a second memory capable of being accessed by the second integrated circuit, and a third memory capable of being accessed by the third integrated circuit, wherein, the first integrated circuit includes: a first image processing circuit capable of read and write processing of image data to the first memory, and first image processing for image data stored in the first memory; and a first serial interface capable of direct memory access transfer of image data between the first memory and the third memory, and wherein, the second integrated circuit includes: a second image processing circuit capable of read and write processing of image data to the second memory, and second image processing for image data stored in the second memory; and a second serial interface capable of direct memory access transfer of image data between the second memory and the third memory, and wherein, the third integrated circuit includes: a third image processing circuit capable of read and write processing of image data to the third memory, and third image processing for image data stored in the third memory; and a third serial interface capable of direct memory access transfer of image data between the third memory and the first memory, and between the third memory and the second memory. |
地址 |
Kahoku-shi JP |