GM-ratioed amplifier

摘要

Embodiments provide a gm-ratioed amplifier. The gm-ratioed amplifier comprises a first input voltage terminal and a second input voltage terminal, a first output voltage terminal and a second output voltage terminal, and an amplifying unit. The amplifying unit may be coupled between the input voltage terminals and the output voltage terminals and may be adapted to supply an output voltage to the output terminals in dependence on an input voltage supplied to the input terminals. The amplifying unit may comprise a gm-load, which comprises a first load branch comprising a first field effect transistor, and a second load branch comprising a second field effect transistor. A first source/drain terminal and a gate terminal of the first field effect transistor may be coupled to the first output voltage terminal, and a first source/drain terminal and a gate terminal of the second field effect transistor may be coupled to the second output voltage terminal. A second source/drain terminal of the first field effect transistor and a second source/drain terminal of the second field effect transistor may be coupled with each other through a first transistor arrangement such that a linearity of response of the output voltage to the input voltage is improved.

主权项

1. A gm-ratioed amplifier, comprising:
a first input voltage terminal and a second input voltage terminal; a first output voltage terminal and a second output voltage terminal; and an amplifying unit being coupled between the input voltage terminals and the output voltage terminals and being adapted to supply an output voltage to the output voltage terminals in dependence on an input voltage supplied to the input terminals, wherein the amplifying unit comprises a gm-load; the gm-load comprising a first load branch comprising a first field effect transistor, and a second load branch comprising a second field effect transistor; wherein a first source/drain terminal and a gate terminal of the first field effect transistor is coupled to the first output voltage terminal, and wherein a first source/drain terminal and a gate terminal of the second field effect transistor is coupled to the second output voltage terminal; wherein a second source/drain terminal of the first field effect transistor and a second source/drain terminal of the second field effect transistor are coupled with each other through a first transistor arrangement such that a linearity of response of the output voltage to the input voltage is improved.