Anti-aliasing sampling circuits and analog-to-digital converter

摘要

A sampling circuit, such as the sampling circuit of a successive approximation analog-to-digital converter (ADC), provides anti-aliasing filtering of a sampled input signal. The circuit samples the input signal using multiple capacitors, wherein each capacitor samples the input signal at a distinct time during a sampling time interval. The circuit combines the samples stored on different capacitors during a conversion time interval, and generates a digital output signal using the combined samples. In one example, a first bit of the output signal is generated using a sample stored on a first capacitor, and second bit of the output signal is generated using a sample stored on a second capacitor. In another example, the circuitry performs finite or infinite impulse response (FIR or IIR) filtering of the input signal, where a filter characteristic is determined by the relative sizes of the capacitors used for sampling.

主权项

1. A circuit comprising:
a first capacitor for sampling an analog input signal at a first time during a sampling time interval; a second capacitor for sampling the analog input signal at a second time during the sampling time interval, wherein the second time is distinct from the first time; and circuitry operative to combine samples stored on the first and second capacitors, and to generate a digital output signal using the combined samples during a conversion time interval distinct from the sampling time interval, wherein the circuitry is operative to perform an analog-to-digital conversion operation to generate the digital output signal by operating on charge sampled and stored on the first and second capacitors during the sampling time interval.