| 摘要 |
Provided is a reference voltage generation circuit that has a flat temperature characteristic even when there are fluctuations in manufacturing step. After a semiconductor manufacturing process is finished, electrical characteristics of a semiconductor device are evaluated. Temperature characteristic of each reference voltage (VREF) of three unit reference voltage generation circuits (10) is evaluated. Then only a unit reference voltage generation circuit (10) having the most flat temperature characteristics is selected from among the three unit reference voltage generation circuits (10). Only fuses (13, 14) of the selected unit reference voltage generation circuit (10) are not cut, but other fuses (13, 14) are cut. Accordingly only the selected unit reference voltage generation circuit (10) operates, and the other unit reference voltage generation circuits (10) do not operate. |
| 主权项 |
1. A reference voltage generation circuit mounted on a semiconductor device, for generating a reference voltage,
the reference voltage generation circuit comprising a plurality of unit reference voltage generation circuits connected in parallel, the plurality of unit reference voltage generation circuits each comprising:
a constant current circuit for generating a constant current, the constant current circuit comprising a depletion type NMOS transistor, which includes a gate electrode having N-type conductivity and includes a gate and a source connected to each other;an enhancement type NMOS transistor, which includes a gate electrode having P-type conductivity and is diode-connected in series to the constant current circuit, the enhancement type NMOS transistor having the same channel impurity profile as a channel impurity profile of the depletion type NMOS transistor;a first current interruption circuit for interrupting a current, which is connected in series to the constant current circuit and the enhancement type NMOS transistor; anda second current interruption circuit provided between a drain of the enhancement type NMOS transistor and a reference voltage terminal, the plurality of unit reference voltage generation circuits having different channel impurity profiles. |
