INPUT CIRCUIT AND POWER SUPPLY CIRCUIT

摘要

An input circuit connected to a semiconductor circuit is configured to receive a voltage indicating an on/off operation state of a power supply and to output a voltage that is lower than a breakdown voltage of the semiconductor circuit. The input circuit includes a first nMOS transistor and a resistor element. The first nMOS transistor has a drain receiving an outside voltage, a gate receiving a bias voltage higher than a power supply voltage inputted to a semiconductor circuit, and a source connected to the semiconductor circuit. The first nMOS transistor has a breakdown voltage higher than the power supply voltage inputted to the semiconductor circuit. One end of the resistor element connects with the source of the first nMOS transistor, while the other end connects with a reference potential of the semiconductor circuit.

主权项

1. A power supply circuit, comprising:
an input circuit connected to a semiconductor circuit, the input circuit configured to receive an enable voltage indicating an operation state of a power supply circuit and to output an enable output voltage that is lower than a breakdown voltage of the semiconductor circuit, the input circuit including: a first nMOS transistor having a drain electrode connected to an enable voltage input terminal for receiving the enable voltage, a gate electrode for receiving a bias voltage, the bias voltage being higher than a power supply voltage supplied to the semiconductor circuit, and a source electrode connected to the semiconductor circuit, the first nMOS transistor having a breakdown voltage higher than the power supply voltage; and a resistor element connected to the source electrode of the first nMOS transistor, wherein the first nMOS transistor operates in a non-saturation range when the enable voltage is lower than or equal to a predetermined value and in a saturation range when the enable voltage is higher than the predetermined value.