发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a PLL circuit comprising at least a phase/frequency comparison circuit, a charge pump, a low pass filter and a voltage-controlled oscillation circuit connected in this order which suppresses increases in phase noise and power consumption by additionally employing a relatively simple compensation circuit.SOLUTION: The PLL circuit includes the compensation circuit for compensating for a control voltage of the voltage-controlled oscillation circuit after a lockup. The compensation circuit has a voltage division circuit for dividing a supply voltage of the charge pump stepwise to output a divided voltage, a comparison circuit for comparing the divided voltage stepwise with the control voltage of the voltage-controlled oscillation circuit after the lockup to detect a voltage difference, and a frequency change circuit for changing an oscillation frequency range characteristic of the voltage-controlled oscillation circuit in accordance with the detected voltage difference. After the oscillation frequency range characteristic is changed and another lockup is achieved, the compensation is repeated until the control voltage of the voltage-controlled oscillation circuit locks up near the middle of the supply voltage of the charge pump.
申请公布号 JP2014158146(A) 申请公布日期 2014.08.28
申请号 JP20130027549 申请日期 2013.02.15
申请人 TOPPAN PRINTING CO LTD 发明人 TSUSHIMA HIROYUKI
分类号 H03L7/099;H03L7/095 主分类号 H03L7/099
代理机构 代理人
主权项
地址