| 发明名称 |
MEMORY CONTROLLER, STORAGE DEVICE, AND MEMORY CONTROL METHOD |
| 摘要 |
According to one embodiment, a memory controller includes: a first flash encoding unit that performs flash encoding on user data according to a first scheme to generate user data flash codes; an encoding unit that performs an error correction encoding process on the user data flash codes to generate parities; a second flash encoding unit that performs flash encoding on the parities according to a second scheme to generate parity flash codes; and a memory I/F that writes the user data flash codes and the parity flash codes to the nonvolatile memory. |
| 申请公布号 |
US2014245103(A1) |
申请公布日期 |
2014.08.28 |
| 申请号 |
US201314017809 |
申请日期 |
2013.09.04 |
| 申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
TORII Osamu;SUZUKI Riki;YAMAKI Ryo;KOKUBUN Naoaki;MIYASHITA Daisuke;OIKAWA Kohei |
| 分类号 |
G06F11/10 |
主分类号 |
G06F11/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory controller that controls a nonvolatile memory, comprising:
a first flash encoding unit that performs flash encoding on user data according to a first scheme to generate user data flash codes; an encoding unit that performs an error correction encoding process on the user data flash codes to generate parities; a second flash encoding unit that performs flash encoding on the parities according to a second scheme different from the first scheme to generate parity flash codes; and a memory interface that writes the user data flash codes and the parity flash codes to the nonvolatile memory. |
| 地址 |
Minato-ku JP |
