主权项 |
1. A semiconductor device comprising:
a semiconductor chip which includes a plurality of chip pads; and a substrate on which the semiconductor chip is flip-chip mounted and which includes substrate pads that are connected to the chip pads, and a via, wherein the semiconductor chip includes an input and output cell array that is constituted by a plurality of input and output cells including a first input and output cell, a second input and output cell, and a third input and output cell which are linearly arranged and are adjacent to each other, the plurality of chip pads include a first pad that is electrically connected to the first input and output cell, a second pad that is electrically connected to the second input and output cell, and a third pad that is electrically connected to the third input and output cell, the substrate includes a first substrate pad that faces and is connected to the first pad, a second substrate pad that faces and is connected to the second pad, and a third substrate pad that faces and is connected to the third pad, a gap between the first substrate pad and the third substrate pad is narrower than the sum of a minimum width of an interconnection which is permitted from design constraints on the substrate and two times a space value that is required for the interconnection and each of the substrate pads, in the semiconductor chip, the first pad and the third pad are arranged adjacent to each other on a side further outward in comparison to the input and output cell array, and the second pad is arranged on an inner side in comparison to the input and output cell array to be spaced away from each of the first pad and the third pad in such a manner that the second substrate pad is arranged to be spaced away from the first substrate pad and the third substrate pad by a distance that is equal to or greater than the sum of a diameter of the via provided to the substrate on which the semiconductor chip is flip-chip mounted and two times a minimum space value that is required for a gap between the via and each of the substrate pads in design constraints. |