发明名称 |
A TESTER WITH MIXED PROTOCOL ENGINE IN A FPGA BLOCK |
摘要 |
<p>Automated test equipment capable of performing a high-speed test of semiconductor devices is presented. The automated test equipment comprises a system controller for controlling a test program, wherein the system controller is coupled to a bus. The tester system further comprises a plurality of modules also coupled to the bus, where each module is operable to test a plurality of DUTs. Each of the modules comprises a tester processor coupled to the bus and a plurality of configurable blocks communicatively coupled to the tester processor. Each of the configurable blocks is operable to communicate with an associated DUT and further operable to be programmed with a communication protocol for communicating test data to and from said associated device under test.</p> |
申请公布号 |
WO2014130055(A1) |
申请公布日期 |
2014.08.28 |
申请号 |
WO2013US28333 |
申请日期 |
2013.02.28 |
申请人 |
ADVANTEST CORPORATION;FREDIANI, JOHN;NIEMIC, ANDREW |
发明人 |
FREDIANI, JOHN;NIEMIC, ANDREW |
分类号 |
G06F11/22;G01R31/3177 |
主分类号 |
G06F11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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