发明名称 Column parallel readout image sensors with shared column analog-to-digital converter circuitry
摘要 Electronic devices may include image sensors having image sensor pixels arranged in rows and columns. Pixels arranged along a column may be coupled to a common column line. Two or more column lines may by coupled to a shared analog-to-digital converter circuit. The shared analog to digital converter circuit may sample and hold reset-level or image-level voltages presented on the column line. The shared analog to digital converter circuits may pre-amplify and convert the voltages to digital signals. The shared analog-to-digital converter may simultaneously sample pixel voltages for all columns in a selected row of the pixel array. The image sensor may read the converted signals out of memory for an active row in the pixel array while simultaneously sampling and holding the voltages for the next row of the pixel array.
申请公布号 US8817153(B2) 申请公布日期 2014.08.26
申请号 US201213550573 申请日期 2012.07.16
申请人 Aptina Imaging Corporation 发明人 Bahukhandi Ashirwad;Yan Hai
分类号 H04N3/14;H04N5/335 主分类号 H04N3/14
代理机构 Treyz Law Group 代理人 Treyz Law Group ;Lyons Michael H.
主权项 1. A method of operating an image sensor having a plurality of image sensor pixels, comprising: with a first input of a data converting circuit, receiving first signals from a first image sensor pixel in the plurality of image sensor pixels via a first output line; with a second input of the data converting circuit, receiving second signals from a second image sensor pixel in the plurality of image sensor pixels via a second output line; with the data converting circuit, simultaneously sampling the first and second signals; during a first phase, converting the first sampled signals with the data converting circuit; during a second phase that is different than the first phase, converting the second sampled signals with the data converting circuit, wherein simultaneously sampling the first and second signals comprises: with a first capacitor in the data converting circuit, receiving the first signals from the first output line, andwith a second capacitor in the data converting circuit, receiving the second signals from the second output line, wherein the data converting circuit further includes a comparator that is coupled to the first capacitor through a first switch and that is coupled to the second capacitor through a second switch; with the comparator, receiving the first sampled signals from the first capacitor through the first switch while the second switch is inactive; and with the comparator, receiving the second sampled signals from the second capacitor through the second switch while the first switch is inactive.
地址 George Town KY