发明名称 |
Semiconductor storage device and manufacturing method thereof |
摘要 |
In a non-volatile memory, writing/erasing is performed by changing a total charge amount by injecting electrons and holes into a silicon nitride film, which serves as a charge accumulation layer. The gate electrode of a memory cell has a laminated structure made of a plurality of polysilicon films with different impurity concentrations. In a two-layered structure the gate electrode has a p-type polysilicon film with a low impurity concentration and a p+-type polysilicon film with a high impurity concentration deposited thereon. Holes are injected into the charge accumulation layer from the gate electrode. |
申请公布号 |
US8816426(B2) |
申请公布日期 |
2014.08.26 |
申请号 |
US201313845005 |
申请日期 |
2013.03.17 |
申请人 |
Renesas Electronics Corporation |
发明人 |
Yanagi Itaru;Mine Toshiyuki;Hamamura Hirotaka;Hisamoto Digh;Shimamoto Yasuhiro |
分类号 |
H01L29/792 |
主分类号 |
H01L29/792 |
代理机构 |
Miles & Stockbridge P.C. |
代理人 |
Miles & Stockbridge P.C. |
主权项 |
1. A semiconductor device comprising:
(a) a semiconductor substrate; (b) a first gate insulating film formed over the semiconductor substrate; (c) a first gate electrode formed over the first gate insulating film; (d) a second gate insulating film formed over the semiconductor substrate and over a side wall of the first gate electrode, the second gate insulating film including a charge accumulation portion; (e) a second gate electrode formed over the second gate insulating film adjacent to the first gate electrode through the second gate insulating film; (f) a well region formed in the semiconductor substrate, the well region including p-type impurities; (g) a first semiconductor region formed in the well region under one side of the first gate electrode, the first semiconductor region including n-type impurities; and (h) a second semiconductor region formed in the well region under one side of the second gate electrode, the second semiconductor region including n-type impurities, wherein the first gate electrode includes n-type impurities, wherein the second gate electrode is formed of a first silicon film having p-type impurities, wherein the first silicon film includes an upper portion and a lower portion located between the upper portion and the second gate insulating film, wherein a first p-type impurity concentration of the upper portion of the first silicon film is higher than a second p-type impurity concentration of the lower portion of the first silicon film, and wherein holes are injected into the charge accumulation portion from the second gate electrode. |
地址 |
Kawasaki-shi JP |