发明名称 HIGH EFFICIENCY TRAP FOR DEPOSITION PROCESS
摘要 The present invention provides a system, apparatus and method for improving the efficiency of a semiconductor processing system, such as a deposition system by decreasing or substantially eliminating the accumulation of by-products in the apparatus components of the semiconductor processing system. The present invention further relates to improving the efficiency of a foreline trap associated with a semiconductor processing system, wherein the trap removes substantially all of the by-products from the exhaust gas from the processing chamber. In addition, the present invention provides a system, apparatus and method for efficiently clearing traps of accumulated by-products from exhaust gas of a semiconductor processing system.
申请公布号 KR101434815(B1) 申请公布日期 2014.08.26
申请号 KR20137019608 申请日期 2006.05.09
申请人 发明人
分类号 H01L21/02;H01L21/205 主分类号 H01L21/02
代理机构 代理人
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