发明名称 Clock structure with calibration circuitry
摘要 An integrated circuit includes a clock circuit that may be used to provide clock signals to multiple input-output circuits. The integrated circuit may also include different clock structures. As an example, one of the clock structures may have multiple clock paths of substantially equal lengths while another clock structure may have a fly-by clock path. The multiple clock paths may be used to convey a subset of the clock signals to the input-output circuits. Similarly, the fly-by clock path may be used to transmit a second subset of the clock signals to the input-output circuits.
申请公布号 US8816743(B1) 申请公布日期 2014.08.26
申请号 US201313749450 申请日期 2013.01.24
申请人 Altera Corporation 发明人 Lu Sean Shau-Tu;Chong Yan;Au Kin Hong;Nguyen Khai
分类号 H03K3/013 主分类号 H03K3/013
代理机构 代理人
主权项 1. An integrated circuit comprising: a clock circuit that provides a plurality of clock signals; a plurality of input-output circuits; a first clock structure having a plurality of clock paths of substantially equal lengths, wherein the plurality of clock paths conveys a first subset of the plurality of clock signals to the plurality of input-output circuits; and a second clock structure having a fly-by clock path, wherein the fly-by clock path transmits a second subset of the plurality of clock signals to the plurality of input-output circuits.
地址 San Jose CA US
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