| 发明名称 | Semiconductor memory device and an operation method thereof | ||
| 摘要 | A semiconductor memory device includes: a data transfer line coupled with a plurality of memory cell arrays corresponding to an address; an enable signal delayer configured to generate an enable signal by reflecting a delay amount corresponding to the address into an internal command signal corresponding to a column command; and a data exchange block configured to exchange data with the data transfer line in response to the enable signal. | ||
| 申请公布号 | US8817557(B2) | 申请公布日期 | 2014.08.26 |
| 申请号 | US201213494642 | 申请日期 | 2012.06.12 |
| 申请人 | SK Hynix Inc. | 发明人 | Jung Jeongsu |
| 分类号 | G11C7/00;G11C8/00 | 主分类号 | G11C7/00 |
| 代理机构 | IP & T Group LLP | 代理人 | IP & T Group LLP |
| 主权项 | 1. A semiconductor memory device, comprising: a data transfer line coupled with a plurality of memory cell arrays corresponding to an address; an enable signal delayer configured to generate an enable signal by reflecting a delay amount corresponding to the address into an internal command signal corresponding to a column command; and a data exchange block configured to exchange data with the data transfer line in response to the enable signal. | ||
| 地址 | Gyeonggi-do KR | ||