发明名称 Phase locked loop circuit having a voltage controlled oscillator with improved bandwidth
摘要 A voltage controlled oscillator includes a plurality of serially connected composite gain stages. A composite gain stage includes a transconductance stage and a transimpedance stage. The transconductance stage has first and second current paths from a first power supply voltage terminal to a second power supply voltage terminal. A first variable resistance is coupled between the first and second current paths. The transimpedance stage has a first inverter and a second inverter. The first inverter has an input terminal coupled to the output of the first current path and an output terminal. The second inverter has an input terminal coupled to the output of the second current path, and an output terminal. A second variable resistance is coupled between the input terminal and the output terminal of the first inverter, and a third variable resistance is coupled between the input terminal and the output terminal of the second inverter.
申请公布号 US8816782(B2) 申请公布日期 2014.08.26
申请号 US201113104449 申请日期 2011.05.10
申请人 Freescale Semiconductor, Inc. 发明人 Chang Yi Cheng
分类号 H03K3/03;H03B5/02;H03L7/00 主分类号 H03K3/03
代理机构 代理人 Hill Daniel D.
主权项 1. A voltage controlled oscillator comprising: a plurality of serially connected composite gain stages, a composite gain stage of the plurality of serially connected composite gain stages comprising: a transconductance stage having first and second current paths from a first power supply voltage terminal to a second power supply voltage terminal, each of the first and second current paths having an input terminal and an output terminal, and a first variable resistance coupled between the first and second current paths, the first variable resistance responsive to a first, fine tune control signal that adjusts a frequency of the voltage controlled oscillator during operation of the voltage controlled oscillator, wherein the fine tune control signal is generated based on a determination of whether an output signal from the voltage controlled oscillator leads or lags a reference signal; anda transimpedance stage having a first inverter and a second inverter, the first inverter having an input terminal coupled to the output of the first current path and an output terminal, the second inverter having an input terminal coupled to the output of the second current path, and an output terminal, a second variable resistance coupled between the input terminal and the output terminal of the first inverter, a third variable resistance coupled between the input terminal and the output terminal of the second inverter, the second and third variable resistances responsive to a second, coarse tune control signal that is generated based on the first, fine tune control signal, wherein the second, coarse tune control signal adjusts a frequency range of the voltage controlled oscillator until the frequency range is in a desired range.
地址 Austin TX US