| 发明名称 |
Chip package and a method for manufacturing a chip package |
| 摘要 |
A chip package is provided, the chip package including: a carrier including at least one cavity; a chip disposed at least partially within the at least one cavity; at least one intermediate layer disposed over at least one side wall of the chip; wherein the at least one intermediate layer is configured to thermally conduct heat from the chip to the carrier. |
| 申请公布号 |
US8815647(B2) |
申请公布日期 |
2014.08.26 |
| 申请号 |
US201213602349 |
申请日期 |
2012.09.04 |
| 申请人 |
Infineon Technologies AG |
发明人 |
Otremba Ralf;Roemer Bernd;Griebl Erich;Brucchi Fabio |
| 分类号 |
H01L21/00;H01L23/34 |
主分类号 |
H01L21/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A chip package comprising;
a carrier comprising at least one cavity; a chip disposed at least partially within the at least one cavity; at least one intermediate layer disposed over at least one side wall of the chip; wherein the at least one intermediate layer is configured to thermally conduct heat from the chip to the carrier, wherein the at least one intermediate layer comprises a first metal layer formed over a chip back side and the at least one side wall, wherein the first metal layer forms at least part of a chip back side metallization layer; and a die attach layer formed over the first metal layer, wherein the die attach layer electrically connects the chip back side and the at least one side wall to the carrier. |
| 地址 |
Neubiberg DE |
