发明名称 Fin Deformation Modulation
摘要 A method includes forming a plurality of trenches extending from a top surface of a semiconductor substrate into the semiconductor substrate, with semiconductor strips formed between the plurality of trenches. The plurality of trenches includes a first trench and second trench wider than the first trench. A first dielectric material is filled in the plurality of trenches, wherein the first trench is substantially fully filled, and the second trench is filled partially. A second dielectric material is formed over the first dielectric material. The second dielectric material fills an upper portion of the second trench, and has a shrinkage rate different from the first shrinkage rate of the first dielectric material. A planarization is performed to remove excess second dielectric material. The remaining portions of the first dielectric material and the second dielectric material form a first and a second STI region in the first and the second trenches, respectively.
申请公布号 US2014231919(A1) 申请公布日期 2014.08.21
申请号 US201313769783 申请日期 2013.02.18
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 Peng Chih-Tang;Huang Tai-Chun;Lien Hao-Ming
分类号 H01L21/762;H01L27/088 主分类号 H01L21/762
代理机构 代理人
主权项 1. A method comprising: forming a plurality of trenches extending from a top surface of a semiconductor substrate into the semiconductor substrate, with semiconductor strips formed between the plurality of trenches, wherein the plurality of trenches comprises a first trench and second trench wider than the first trench; filling a first dielectric material in the plurality of trenches, wherein the first trench is substantially fully filled, and the second trench is filled partially, and wherein the first dielectric material has a first shrinkage rate; forming a second dielectric material over the first dielectric material, wherein the second dielectric material fills an upper portion of the second trench, and wherein the second dielectric material has a second shrinkage rate different from the first shrinkage rate; and performing a planarization to remove excess portions of the second dielectric material over the semiconductor substrate, wherein remaining portions of the first dielectric material and the second dielectric material form a first and a second Shallow Trench Isolation (STI) region in the first and the second trenches, respectively.
地址 Hsin-Chu TW