VERIFICATION PROGRAM, VERIFICATION METHOD, AND VERIFICATION DEVICE

摘要

PROBLEM TO BE SOLVED: To sufficiently verify contention that may occur in an integrated circuit and properly evaluate completeness of the verification.SOLUTION: A verification method includes: a step S4 of acquiring a first busy period of signals which are transferred between one master unit and one slave unit among verification targets including a plurality of master units and slave units connected to a bus; a step S5 of acquiring second combination information indicating a combination of the master unit and the slave unit between which signals are transferred in a second busy period at least a part of which overlaps with the first busy period; a step S6 of comparing the first busy period with a set third busy period; and a step S7 of recording the second combination information in association with first combination information indicating a combination of the one master unit and the one slave unit, when the first busy period is longer than the third busy period.