发明名称 SEMICONDUCTOR GATE STRUCTURE FOR THRESHOLD VOLTAGE MODULATION AND METHOD OF MAKING SAME
摘要 A gate structure of a semiconductor device having a NFET and a PFET, includes a lower layer of a hafnium-based dielectric over the gates of the NFET and PFET, and an upper layer of a lanthanide dielectric. The dielectrics are annealed to mix them above the NFET resulting in a lowered work function, and corresponding threshold voltage reduction. An annealed, relatively thick titanium nitride cap over the mixed dielectric above the NFET gate also lowers the work function and threshold voltage. Above the TiN cap and the hafnium-based dielectric over the PFET gate, is another layer of titanium nitride that has not been annealed. A conducting layer of tungsten covers the structure.
申请公布号 US2014231922(A1) 申请公布日期 2014.08.21
申请号 US201313770493 申请日期 2013.02.19
申请人 GLOBALFOUNDRIES, INC. 发明人 Kim Hoon;Choi Kisik
分类号 H01L29/40;H01L29/49 主分类号 H01L29/40
代理机构 代理人
主权项 1. A method, comprising: providing a semiconductor device comprising a n-type transistor and a p-type transistor; creating a first dielectric layer of at least one dielectric material over the semiconductor device; depositing a first layer of work function material lacking aluminum over the transistors; altering a work function of the first layer of work function material by annealing; and separating work functions of the transistors by removing the first layer of work function material over the one of the transistors.
地址 Grand Cayman KY US