METHOD FOR FABRICATING A SEMICONDUCTOR INTEGRATED CIRCUIT WITH A LITHO-ETCH, LITHO-ETCH PROCESS FOR ETCHING TRENCHES

摘要

Methods are provided for fabricating semiconductor integrated circuits including isolated trench features. In one embodiment, a method includes providing a semiconductor substrate with an overlying process layer. A trench pattern to be etched into the process layer is determined and that trench pattern is decomposed into first and second patterns, the second pattern including an isolated trench. First and second lithographic masks are formed to implement the first and second patterns, the second mask implementing the second pattern, the isolated trench, and a plurality of density balancer patterns symmetrically positioned with respect to the isolated trench. A first resist layer is patterned with the first lithographic mask and the process layer is etched with the first resist layer. A second resist layer is patterned with the second lithographic mask and the process layer is etched with the second resist layer to implement the required trench pattern in the process layer.

主权项

1. A method for fabricating a semiconductor integrated circuit comprising:
providing a semiconductor substrate with an overlying process layer; determining a required trench pattern to be etched into the process layer; decomposing the required trench pattern into a first pattern and a second pattern, the second pattern including an isolated trench and further including a plurality of density balancer patterns symmetrically positioned with respect to the isolated trench; generating a first lithographic mask implementing the first pattern and a second lithographic mask implementing the second pattern including the isolated trench and the density balancer patterns; patterning a first resist layer overlying the process layer with the first lithographic mask and etching the process layer with the patterned first resist layer as an etch mask; and patterning a second resist layer overlying the process layer with the second lithographic mask and etching the process layer with the patterned second resist layer as an etch mask to implement the required trench pattern in the process layer.