发明名称 METHOD AND APPARATUS FOR HYBRID CHIP-LEVEL VOLTAGE SCALING
摘要 Various aspects of a power management approach for a system-on-a-chip (SoC) is disclosed herein. In one aspect, the approach includes implementing a power profile for supplying power to a plurality of subsystems on a shared power bus in the SoC. The power profile includes at least one adjustable parameter for controlling the supplied power during an active use state. The approach further includes detecting a power profile change trigger; modifying the power profile based on the power profile change trigger; and adjusting the supplied power during the active use state based on the modified power profile to maintain a predetermined supplied power level
申请公布号 US2014232188(A1) 申请公布日期 2014.08.21
申请号 US201313771064 申请日期 2013.02.19
申请人 QUALCOMM INCORPORATED 发明人 Cheriyan Ajay;Joshi Rajesh;Krishnappa Madan
分类号 H02J1/00 主分类号 H02J1/00
代理机构 代理人
主权项 1. A method for power management of a system-on-a-chip (SoC), comprising: implementing a power profile for supplying power to a plurality of subsystems on a shared power bus, wherein the power profile comprises at least one adjustable parameter for controlling the supplied power during an active use state; detecting a power profile change trigger; modifying the power profile based on the power profile change trigger; and adjusting the supplied power during the active use state based on the modified power profile to maintain a predetermined supplied power level.
地址 San Diego CA US