发明名称 |
MULTI-PROCESSOR PARALLEL SIMULATION METHOD, SYSTEM AND SCHEDULER |
摘要 |
<p>The present invention provides a method and a system for simulating multiple processors in parallel, and a scheduler. In this embodiment, the scheduler maps debug interface information of a to-be-simulated processor requiring debugging onto the scheduler during parallel simulation of multiple processors, so that the scheduler is capable of debugging, by using a master thread, the to-be-simulated processor requiring debugging via a debug interface of the to-be-simulated processor requiring debugging pointed by the debug interface information, thereby implementing debugging during parallel simulation of multiple processors.</p> |
申请公布号 |
EP2672388(A4) |
申请公布日期 |
2014.08.20 |
申请号 |
EP20120832221 |
申请日期 |
2012.09.13 |
申请人 |
HUAWEI TECHNOLOGIES CO., LTD |
发明人 |
YE, HANDONG;CAO, JIONG;YE, XIAOCHUN;WANG, DA |
分类号 |
G06F11/26 |
主分类号 |
G06F11/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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