| 摘要 |
<p>Improved systems and methods of phase detecting are described. In one aspect, a phase detector includes a latch having an input stage and an output stage. The input stage couples to the output stage through a dynamic storage node and includes a discharge circuit. The discharge circuit has a first input and a second input and defines a discharge path for discharging the dynamic storage node that is substantially symmetric with respect to the first and second inputs. In another aspect, the dynamic storage node is discharged with a characteristic discharge time in response to a transition of the first input from a low logic level to a high logic level when the second input is at a high logic level. The dynamic storage node also is discharged with substantially the same characteristic discharge time in response to a transition of the second input from a low logic level to a high logic level when the first input is at a high logic level.</p> |
