| 摘要 |
There is provided a semiconductor wafer having a base wafer, an insulating layer, and a SixGe1-x crystal layer (0≰x<1) in the stated order. Here, at least a partial region of the SixGe1-x crystal layer (0≰x<1) has been subjected to annealing, and the semiconductor wafer comprises a compound semiconductor that has a lattice match or a pseudo lattice match with the at least partial region of the SixGe1-x crystal layer (0≰x<1). Furthermore, there is provided an electronic device including a substrate, an insulating layer disposed on the substrate, a SixGe1-x crystal layer (0≰x<1) disposed on the insulating layer, at least a partial region of the SixGe1-x crystal layer (0≰x<1) having been subjected to annealing, a compound semiconductor that has a lattice match or a pseudo lattice match with the at least partial region of the SixGe1-x crystal layer (0≰x<1), and a semiconductor device formed using the compound semiconductor. |
