| 摘要 |
The board has a first integrated circuit (IC1), provided with a data output (A), and a switching unit (B) for generating a supply voltage (Ub) relative to a reference potential (GND) for second and third integrated circuits (IC2, IC3) e.g. RAM. A T-shaped signal line (L) has a transmission end connected with the data output and two line ends respectively connected with data inputs (E1, E2) of the second and/or third integrated circuits. Two load resistors (R1, R4) are terminated against the supply voltage and the reference potential, respectively. |
