发明名称 Memory management system and memory management method
摘要 A memory management system and method include and use a cache buffer (such as a table look-aside buffer, TLB), a memory mapping table, a scratchpad cache, and a memory controller. The cache buffer is configured to store a plurality of data structures. The memory mapping table is configured to store a plurality of addresses of the data structures. The scratchpad cache is configured to store the base address of the data structures. The memory controller is configured to control reading and writing in the cache buffer and the scratchpad cache. The components are operable together under control of the memory controller to facilitate effective searching of the data structures in the memory management system.
申请公布号 US8812782(B2) 申请公布日期 2014.08.19
申请号 US201012694470 申请日期 2010.01.27
申请人 VIA Technologies, Inc. 发明人 Li Jian;Lai Jiin;Pang Shan-Na;Hui Zhi-Qiang;Dai Di
分类号 G06F12/00;G06F12/10 主分类号 G06F12/00
代理机构 Stout, Uxa & Buyan, LLP 代理人 Stout Donald E.;Stout, Uxa & Buyan, LLP
主权项 1. A memory management system, comprising: a cache buffer configured to store a plurality of data structures; a memory mapping table configured to store a plurality of addresses corresponding to said data structures; a data backup cache configured to store a plurality of base addresses of all data structures in the system memory, wherein all the base addresses of all the data structures are read from said system memory and stored in said data backup cache when said system is in an idle state; and a memory controller configured to control said data structures being read and written in said cache buffer and said data backup cache, whereby when an address corresponding to an instruction is not available in said memory mapping table, said memory controller is configured to read a specific data structure according to said instruction and a corresponding base address stored in the data backup cache from the system memory and to store said specific data structure corresponding to said instruction in said cache buffer.
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